diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-add-lxa-tac.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-lxa-tac-add-Linux-Automation-GmbH-TAC.patch similarity index 56% rename from meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-add-lxa-tac.patch rename to meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-lxa-tac-add-Linux-Automation-GmbH-TAC.patch index 49ebdd94..f0b805c9 100644 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-add-lxa-tac.patch +++ b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0001-fdts-lxa-tac-add-Linux-Automation-GmbH-TAC.patch @@ -1,12 +1,30 @@ From: Rouven Czerwinski Date: Fri, 18 Jun 2021 11:07:20 +0200 -Subject: [PATCH] fdts: add lxa tac +Subject: [PATCH] fdts: lxa-tac: add Linux Automation GmbH TAC +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Linux Automation Test Automation Controller (LXA TAC)[1] is an embedded +software development tool built around the Octavo Systems OSD32MP15x SiP. + +The device contains an eMMC for storage, a DSA-capable on board ethernet +switch with two external ports, dual CAN busses, a power switch to turn +a device under test on or off and some other I/O. + +As of now there are two STM32MP157 based hardware generations (Gen 1 and +Gen 2) that have most of their hardware config in common. +In the future there will also be a STM32MP153 based hardware generation. + +[1]: https://www.linux-automation.com/en/products/lxa-tac.html Signed-off-by: Rouven Czerwinski +Signed-off-by: Leonard Göhrs +Signed-off-by: Jan Luebbe --- - fdts/stm32mp157c-lxa-tac-fw-config.dts | 7 +++ - fdts/stm32mp157c-lxa-tac.dts | 81 ++++++++++++++++++++++++++++++++++ - 2 files changed, 88 insertions(+) + fdts/stm32mp157c-lxa-tac-fw-config.dts | 7 ++ + fdts/stm32mp157c-lxa-tac.dts | 134 +++++++++++++++++++++++++++++++++ + 2 files changed, 141 insertions(+) create mode 100644 fdts/stm32mp157c-lxa-tac-fw-config.dts create mode 100644 fdts/stm32mp157c-lxa-tac.dts @@ -25,10 +43,10 @@ index 000000000000..9ee09e93e9ea +#include "stm32mp15-fw-config.dtsi" diff --git a/fdts/stm32mp157c-lxa-tac.dts b/fdts/stm32mp157c-lxa-tac.dts new file mode 100644 -index 000000000000..c5f55cae1d2a +index 000000000000..5988fded94da --- /dev/null +++ b/fdts/stm32mp157c-lxa-tac.dts -@@ -0,0 +1,81 @@ +@@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ +/* + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved @@ -110,3 +128,56 @@ index 000000000000..c5f55cae1d2a + }; + }; +}; ++ ++/* VCO = 624 MHz => P = 208, Q = 48, R = 104 */ ++&pll3 { ++ cfg = <1 51 2 12 5 PQR(1,1,1)>; ++ /delete-property/ frac; ++}; ++ ++/* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */ ++&pll4 { ++ cfg = <3 124 5 9 11 PQR(1,1,1)>; ++ /delete-property/ frac; ++}; ++ ++&rcc { ++ /* change parent clocks */ ++ st,pkcs = < ++ CLK_CKPER_HSE ++ CLK_FMC_ACLK ++ CLK_QSPI_ACLK ++ CLK_ETH_PLL4P ++ CLK_SDMMC12_PLL3R ++ CLK_DSI_DSIPLL ++ CLK_STGEN_HSE ++ CLK_USBPHY_HSE ++ CLK_SPI2S1_PLL3Q ++ CLK_SPI2S23_PLL3Q ++ CLK_SPI45_HSI ++ CLK_SPI6_HSI ++ CLK_I2C46_HSI ++ CLK_SDMMC3_DISABLED ++ CLK_USBO_USBPHY ++ CLK_ADC_CKPER ++ CLK_CEC_DISABLED ++ CLK_I2C12_HSI ++ CLK_I2C35_HSI ++ CLK_UART1_HSI ++ CLK_UART24_HSI ++ CLK_UART35_HSI ++ CLK_UART6_HSI ++ CLK_UART78_HSI ++ CLK_SPDIF_DISABLED ++ CLK_FDCAN_PLL3Q ++ CLK_SAI1_DISABLED ++ CLK_SAI2_DISABLED ++ CLK_SAI3_DISABLED ++ CLK_SAI4_DISABLED ++ CLK_RNG1_LSI ++ CLK_RNG2_LSI ++ CLK_LPTIM1_PCLK1 ++ CLK_LPTIM23_PCLK3 ++ CLK_LPTIM45_LSE ++ >; ++}; diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0002-lxatac-ETH-PLL-configuration.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0002-lxatac-ETH-PLL-configuration.patch deleted file mode 100644 index cb484fcf..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0002-lxatac-ETH-PLL-configuration.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Rouven Czerwinski -Date: Thu, 15 Jul 2021 09:14:58 +0200 -Subject: [PATCH] lxatac: ETH PLL configuration - -Signed-off-by: Rouven Czerwinski ---- - fdts/stm32mp157c-lxa-tac.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/fdts/stm32mp157c-lxa-tac.dts b/fdts/stm32mp157c-lxa-tac.dts -index c5f55cae1d2a..98286ac67aab 100644 ---- a/fdts/stm32mp157c-lxa-tac.dts -+++ b/fdts/stm32mp157c-lxa-tac.dts -@@ -79,3 +79,8 @@ - }; - }; - }; -+ -+/* Configure Eth PLL 125Mhz Clock output */ -+&pll4 { -+ cfg = <3 124 5 11 11 PQR(1,1,1)>; -+}; diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0003-lxatac-use-custom-PLL-configuration.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0003-lxatac-use-custom-PLL-configuration.patch deleted file mode 100644 index 24a644b3..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0003-lxatac-use-custom-PLL-configuration.patch +++ /dev/null @@ -1,90 +0,0 @@ -From: Jan Luebbe -Date: Tue, 26 Jul 2022 14:47:10 +0200 -Subject: [PATCH] lxatac: use custom PLL configuration -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -We configure PLL3 to VCO = 624 MHz => P = 208, Q = 48, R = 104: -- 48 MHz for CAN - 20220726 mkl: - > Bei Classical CAN basiert die Clock auf vielfachen von 8 MHz, das - > spricht für 48 MHz (48/8=6, 78/8=9.75). - > - > Mit 48 MHz können bis auf die unübliche Bitrate von 666.666 kBit/s alle - > standard Raten ohne Bitrate- und Sample Point Error erzeugt werden. - > - > Bei CAN-FD kommen wir mit 48 MHz bis 4 MBit/s ohne Fehler, bei 78 MHz - > nur bis 2 MHz (aber mit Sample Point Error). -- 104 MHz for eMMC - -We configure PLL4 to VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5: -- 125 MHz for Ethernet - -Signed-off-by: Jan Luebbe ---- - fdts/stm32mp157c-lxa-tac.dts | 52 ++++++++++++++++++++++++++++++++++++++++++-- - 1 file changed, 50 insertions(+), 2 deletions(-) - -diff --git a/fdts/stm32mp157c-lxa-tac.dts b/fdts/stm32mp157c-lxa-tac.dts -index 98286ac67aab..5988fded94da 100644 ---- a/fdts/stm32mp157c-lxa-tac.dts -+++ b/fdts/stm32mp157c-lxa-tac.dts -@@ -80,7 +80,55 @@ - }; - }; - --/* Configure Eth PLL 125Mhz Clock output */ -+/* VCO = 624 MHz => P = 208, Q = 48, R = 104 */ -+&pll3 { -+ cfg = <1 51 2 12 5 PQR(1,1,1)>; -+ /delete-property/ frac; -+}; -+ -+/* VCO = 750.0 MHz => P = 125, Q = 75, R = 62.5 */ - &pll4 { -- cfg = <3 124 5 11 11 PQR(1,1,1)>; -+ cfg = <3 124 5 9 11 PQR(1,1,1)>; -+ /delete-property/ frac; -+}; -+ -+&rcc { -+ /* change parent clocks */ -+ st,pkcs = < -+ CLK_CKPER_HSE -+ CLK_FMC_ACLK -+ CLK_QSPI_ACLK -+ CLK_ETH_PLL4P -+ CLK_SDMMC12_PLL3R -+ CLK_DSI_DSIPLL -+ CLK_STGEN_HSE -+ CLK_USBPHY_HSE -+ CLK_SPI2S1_PLL3Q -+ CLK_SPI2S23_PLL3Q -+ CLK_SPI45_HSI -+ CLK_SPI6_HSI -+ CLK_I2C46_HSI -+ CLK_SDMMC3_DISABLED -+ CLK_USBO_USBPHY -+ CLK_ADC_CKPER -+ CLK_CEC_DISABLED -+ CLK_I2C12_HSI -+ CLK_I2C35_HSI -+ CLK_UART1_HSI -+ CLK_UART24_HSI -+ CLK_UART35_HSI -+ CLK_UART6_HSI -+ CLK_UART78_HSI -+ CLK_SPDIF_DISABLED -+ CLK_FDCAN_PLL3Q -+ CLK_SAI1_DISABLED -+ CLK_SAI2_DISABLED -+ CLK_SAI3_DISABLED -+ CLK_SAI4_DISABLED -+ CLK_RNG1_LSI -+ CLK_RNG2_LSI -+ CLK_LPTIM1_PCLK1 -+ CLK_LPTIM23_PCLK3 -+ CLK_LPTIM45_LSE -+ >; - }; diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-Release-2.9-customers-lxa-tac-20240130-2.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-Release-2.9-customers-lxa-tac-20240130-2.patch new file mode 100644 index 00000000..8b916bcb --- /dev/null +++ b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-Release-2.9-customers-lxa-tac-20240130-2.patch @@ -0,0 +1,21 @@ +From: =?UTF-8?q?Leonard=20G=C3=B6hrs?= +Date: Tue, 30 Jan 2024 09:11:27 +0100 +Subject: [PATCH] Release 2.9/customers/lxa/tac/20240130-2 + +--- + Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 2c5748fe1567..760c27ffec92 100644 +--- a/Makefile ++++ b/Makefile +@@ -330,7 +330,7 @@ endif + ifeq (${BUILD_STRING},) + BUILD_STRING := $(shell git describe --always --dirty --tags 2> /dev/null) + endif +-VERSION_STRING := v${VERSION}(${BUILD_TYPE}):${BUILD_STRING} ++VERSION_STRING := v${VERSION}(${BUILD_TYPE}):${BUILD_STRING}-20240130-2 + + ifeq (${AARCH32_INSTRUCTION_SET},A32) + TF_CFLAGS_aarch32 += -marm diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-fix-stm32mp1-fdts-stm32mp1-align-DDR-regulators-with.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-fix-stm32mp1-fdts-stm32mp1-align-DDR-regulators-with.patch deleted file mode 100644 index 112bfb83..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0101-fix-stm32mp1-fdts-stm32mp1-align-DDR-regulators-with.patch +++ /dev/null @@ -1,104 +0,0 @@ -From: Ahmad Fatoum -Date: Thu, 2 Jun 2022 06:28:31 +0200 -Subject: [PATCH] fix(stm32mp1): fdts: stm32mp1: align DDR regulators with new - driver - -With recent changes, TF-A now panics on MC-1, Avenger96 and Odyssey: - - NOTICE: CPU: STM32MP157C?? Rev.B - NOTICE: Model: Linux Automation MC-1 board - ERROR: regul ldo3: max value 750 is invalid - PANIC at PC : 0x2ffeebb7 - -as the driver takes great offense at the content of the device -tree. The parts in question were copy-pasted from ST DTs, but -those ST DTs were fixed by commit 67d95409baae -("refactor(stm32mp1-fdts): update regulator description"). - -Fix the breakage by transplanting the same changes into all -remaining STM32MP1 DTs. - -Change was boot-tested on MC-1, but only build tested for the -other two. - -Fixes: bba9fdee589f ("feat(stm32mp1): add regulator framework compilation") -Signed-off-by: Ahmad Fatoum -Change-Id: I143d0091625f62c313b3b71449c9ad99583d01c8 ---- - fdts/stm32mp157a-avenger96.dts | 4 +--- - fdts/stm32mp157c-odyssey-som.dtsi | 4 +--- - fdts/stm32mp15xx-osd32.dtsi | 4 +--- - 3 files changed, 3 insertions(+), 9 deletions(-) - -diff --git a/fdts/stm32mp157a-avenger96.dts b/fdts/stm32mp157a-avenger96.dts -index b967736e4786..6ae97c7581d1 100644 ---- a/fdts/stm32mp157a-avenger96.dts -+++ b/fdts/stm32mp157a-avenger96.dts -@@ -115,10 +115,9 @@ - - vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; -- regulator-min-microvolt = <500000>; -- regulator-max-microvolt = <750000>; - regulator-always-on; - regulator-over-current-protection; -+ st,regulator-sink-source; - }; - - vdd_usb: ldo4 { -@@ -143,7 +142,6 @@ - vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; - regulator-always-on; -- regulator-over-current-protection; - }; - - bst_out: boost { -diff --git a/fdts/stm32mp157c-odyssey-som.dtsi b/fdts/stm32mp157c-odyssey-som.dtsi -index 6bed33968f73..c4e13985a3f7 100644 ---- a/fdts/stm32mp157c-odyssey-som.dtsi -+++ b/fdts/stm32mp157c-odyssey-som.dtsi -@@ -140,10 +140,9 @@ - - vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; -- regulator-min-microvolt = <500000>; -- regulator-max-microvolt = <750000>; - regulator-always-on; - regulator-over-current-protection; -+ st,regulator-sink-source; - }; - - vdd_usb: ldo4 { -@@ -170,7 +169,6 @@ - vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; - regulator-always-on; -- regulator-over-current-protection; - }; - - bst_out: boost { -diff --git a/fdts/stm32mp15xx-osd32.dtsi b/fdts/stm32mp15xx-osd32.dtsi -index 76a25613a14d..ca672356293c 100644 ---- a/fdts/stm32mp15xx-osd32.dtsi -+++ b/fdts/stm32mp15xx-osd32.dtsi -@@ -81,10 +81,9 @@ - - vtt_ddr: ldo3 { - regulator-name = "vtt_ddr"; -- regulator-min-microvolt = <500000>; -- regulator-max-microvolt = <750000>; - regulator-always-on; - regulator-over-current-protection; -+ st,regulator-sink-source; - }; - - vdd_usb: ldo4 { -@@ -110,7 +109,6 @@ - vref_ddr: vref_ddr { - regulator-name = "vref_ddr"; - regulator-always-on; -- regulator-over-current-protection; - }; - - bst_out: boost { diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0201-refactor-mmc-export-user-boot-partition-switch-funct.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0201-refactor-mmc-export-user-boot-partition-switch-funct.patch deleted file mode 100644 index 2e8e28f6..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0201-refactor-mmc-export-user-boot-partition-switch-funct.patch +++ /dev/null @@ -1,93 +0,0 @@ -From: Ahmad Fatoum -Date: Mon, 23 May 2022 17:06:37 +0200 -Subject: [PATCH] refactor(mmc): export user/boot partition switch functions - -At the moment, mmc_boot_part_read_blocks() takes care to switch -to the boot partition before transfer and back afterwards. -This can introduce large overhead when reading small chunks. -Give consumers of the API more control by exporting -mmc_part_switch_current_boot() and mmc_part_switch_user(). - -Origin: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/15331 -Signed-off-by: Ahmad Fatoum -Change-Id: Ib641f188071bb8e0196f4af495ec9ad4a292284f ---- - drivers/mmc/mmc.c | 34 ++++++++++++++++++++++++++++------ - include/drivers/mmc.h | 2 ++ - 2 files changed, 30 insertions(+), 6 deletions(-) - -diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c -index c327e71d2018..6b8456d1f4b9 100644 ---- a/drivers/mmc/mmc.c -+++ b/drivers/mmc/mmc.c -@@ -755,29 +755,51 @@ static unsigned char mmc_current_boot_part(void) - return PART_CFG_CURRENT_BOOT_PARTITION(mmc_ext_csd[CMD_EXTCSD_PARTITION_CONFIG]); - } - --size_t mmc_boot_part_read_blocks(int lba, uintptr_t buf, size_t size) -+int mmc_part_switch_current_boot(void) - { -- size_t size_read; -- int ret; - unsigned char current_boot_part = mmc_current_boot_part(); -+ int ret; - - if (current_boot_part != 1U && - current_boot_part != 2U) { - ERROR("Got unexpected value for active boot partition, %u\n", current_boot_part); -- return 0; -+ return -EIO; - } - - ret = mmc_part_switch(current_boot_part); - if (ret < 0) { - ERROR("Failed to switch to boot partition, %d\n", ret); -+ } -+ -+ return ret; -+} -+ -+int mmc_part_switch_user(void) -+{ -+ int ret; -+ -+ ret = mmc_part_switch(0); -+ if (ret < 0) { -+ ERROR("Failed to switch to user partition, %d\n", ret); -+ } -+ -+ return ret; -+} -+ -+size_t mmc_boot_part_read_blocks(int lba, uintptr_t buf, size_t size) -+{ -+ size_t size_read; -+ int ret; -+ -+ ret = mmc_part_switch_current_boot(); -+ if (ret < 0) { - return 0; - } - - size_read = mmc_read_blocks(lba, buf, size); - -- ret = mmc_part_switch(0); -+ ret = mmc_part_switch_user(); - if (ret < 0) { -- ERROR("Failed to switch back to user partition, %d\n", ret); - return 0; - } - -diff --git a/include/drivers/mmc.h b/include/drivers/mmc.h -index 834a80f4ac39..2384b679f026 100644 ---- a/include/drivers/mmc.h -+++ b/include/drivers/mmc.h -@@ -236,6 +236,8 @@ size_t mmc_erase_blocks(int lba, size_t size); - size_t mmc_rpmb_read_blocks(int lba, uintptr_t buf, size_t size); - size_t mmc_rpmb_write_blocks(int lba, const uintptr_t buf, size_t size); - size_t mmc_rpmb_erase_blocks(int lba, size_t size); -+int mmc_part_switch_current_boot(void); -+int mmc_part_switch_user(void); - size_t mmc_boot_part_read_blocks(int lba, uintptr_t buf, size_t size); - int mmc_init(const struct mmc_ops *ops_ptr, unsigned int clk, - unsigned int width, unsigned int flags, diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0202-refactor-mmc-replace-magic-value-with-new-PART_CFG_B.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0202-refactor-mmc-replace-magic-value-with-new-PART_CFG_B.patch deleted file mode 100644 index 20129336..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0202-refactor-mmc-replace-magic-value-with-new-PART_CFG_B.patch +++ /dev/null @@ -1,42 +0,0 @@ -From: Ahmad Fatoum -Date: Tue, 31 May 2022 10:03:04 +0200 -Subject: [PATCH] refactor(mmc): replace magic value with new - PART_CFG_BOOT_PARTITION_NO_ACCESS - -Disabling access to the boot partition reverts the MMC to read from the -user area. Add a macro to make this clearer. - -Origin: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/15337 -Suggested-by: Manish V Badarkhe -Signed-off-by: Ahmad Fatoum -Change-Id: I34a5a987980bb4690d08d255f465b11a4697ed5a ---- - drivers/mmc/mmc.c | 2 +- - include/drivers/mmc.h | 1 + - 2 files changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c -index 6b8456d1f4b9..39085395537f 100644 ---- a/drivers/mmc/mmc.c -+++ b/drivers/mmc/mmc.c -@@ -778,7 +778,7 @@ int mmc_part_switch_user(void) - { - int ret; - -- ret = mmc_part_switch(0); -+ ret = mmc_part_switch(PART_CFG_BOOT_PARTITION_NO_ACCESS); - if (ret < 0) { - ERROR("Failed to switch to user partition, %d\n", ret); - } -diff --git a/include/drivers/mmc.h b/include/drivers/mmc.h -index 2384b679f026..d18c5ffbdb6d 100644 ---- a/include/drivers/mmc.h -+++ b/include/drivers/mmc.h -@@ -66,6 +66,7 @@ - #define EXT_CSD_PART_CONFIG_ACC_MASK GENMASK(2, 0) - #define PART_CFG_BOOT_PARTITION1_ENABLE (U(1) << 3) - #define PART_CFG_BOOT_PARTITION1_ACCESS (U(1) << 0) -+#define PART_CFG_BOOT_PARTITION_NO_ACCESS U(0) - #define PART_CFG_BOOT_PART_EN_MASK GENMASK(5, 3) - #define PART_CFG_BOOT_PART_EN_SHIFT 3 - #define PART_CFG_CURRENT_BOOT_PARTITION(x) (((x) & PART_CFG_BOOT_PART_EN_MASK) >> \ diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0203-feat-stm32mp1-extend-STM32MP_EMMC_BOOT-support-to-FI.patch b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0203-feat-stm32mp1-extend-STM32MP_EMMC_BOOT-support-to-FI.patch deleted file mode 100644 index e0dfb6e2..00000000 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/0203-feat-stm32mp1-extend-STM32MP_EMMC_BOOT-support-to-FI.patch +++ /dev/null @@ -1,145 +0,0 @@ -From: Ahmad Fatoum -Date: Thu, 19 May 2022 07:42:33 +0200 -Subject: [PATCH] feat(stm32mp1): extend STM32MP_EMMC_BOOT support to FIP - format - -STM32MP_EMMC_BOOT allowed placing SSBL into the eMMC boot -partition along with FSBL. This allows atomic update of both -FSBL and SSBL at the same time. Previously, this was only -possible for the FSBL, as the eMMC layout expected by TF-A -had a single SSBL GPT partition in the eMMC user area. -TEE binaries remained in dedicated GPT partitions whether -STM32MP_EMMC_BOOT was on or off. - -The new FIP format collects SSBL and TEE partitions into -a single binary placed into a GPT partition. -Extend STM32MP_EMMC_BOOT, so eMMC-booted TF-A first uses -a FIP image placed at offset 256K into the active eMMC boot -partition. If no FIP magic is detected at that offset or if -STM32MP_EMMC_BOOT is disabled, the GPT on the eMMC user area -will be consulted as before. - -This allows power fail-safe update of all firmware using the -built-in eMMC boot selector mechanism, provided it fits into -the boot partition - SZ_256K. SZ_256K was chosen because it's -the same offset used with the legacy format and because it's -the size of the on-chip SRAM, where the STM32MP15x BootROM -loads TF-A into. As such, TF-A may not exceed this size limit -for existing SoCs. - -Origin: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/15332 -Signed-off-by: Ahmad Fatoum -Change-Id: Id7bec45652b3a289ca632d38d4b51316c5efdf8d ---- - plat/st/common/bl2_io_storage.c | 60 +++++++++++++++++++++++++++++++++++-- - plat/st/stm32mp1/stm32mp1_fip_def.h | 3 +- - 2 files changed, 60 insertions(+), 3 deletions(-) - -diff --git a/plat/st/common/bl2_io_storage.c b/plat/st/common/bl2_io_storage.c -index b2038bc65eb9..94c36d9a86fe 100644 ---- a/plat/st/common/bl2_io_storage.c -+++ b/plat/st/common/bl2_io_storage.c -@@ -122,6 +122,37 @@ int open_storage(const uintptr_t spec) - return io_dev_init(storage_dev_handle, 0); - } - -+#if STM32MP_EMMC_BOOT -+static uint32_t get_boot_part_fip_header(void) -+{ -+ io_block_spec_t emmc_boot_fip_block_spec = { -+ .offset = STM32MP_EMMC_BOOT_FIP_OFFSET, -+ .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */ -+ }; -+ uint32_t magic = 0U; -+ int io_result; -+ size_t bytes_read; -+ uintptr_t fip_hdr_handle; -+ -+ io_result = io_open(storage_dev_handle, (uintptr_t)&emmc_boot_fip_block_spec, -+ &fip_hdr_handle); -+ assert(io_result == 0); -+ -+ io_result = io_read(fip_hdr_handle, (uintptr_t)&magic, sizeof(magic), -+ &bytes_read); -+ if ((io_result != 0) || (bytes_read != sizeof(magic))) { -+ panic(); -+ } -+ -+ io_close(fip_hdr_handle); -+ -+ VERBOSE("%s: eMMC boot magic at offset 256K: %08x\n", -+ __func__, magic); -+ -+ return magic; -+} -+#endif -+ - static void print_boot_device(boot_api_context_t *boot_context) - { - switch (boot_context->boot_interface_selected) { -@@ -195,7 +226,7 @@ static void boot_mmc(enum mmc_device_type mmc_dev_type, - panic(); - } - -- /* Open MMC as a block device to read GPT table */ -+ /* Open MMC as a block device to read FIP */ - io_result = register_io_dev_block(&mmc_dev_con); - if (io_result != 0) { - panic(); -@@ -204,6 +235,25 @@ static void boot_mmc(enum mmc_device_type mmc_dev_type, - io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, - &storage_dev_handle); - assert(io_result == 0); -+ -+#if STM32MP_EMMC_BOOT -+ if (mmc_dev_type == MMC_IS_EMMC) { -+ io_result = mmc_part_switch_current_boot(); -+ assert(io_result == 0); -+ -+ if (get_boot_part_fip_header() != TOC_HEADER_NAME) { -+ WARN("%s: Can't find FIP header on eMMC boot partition. Trying GPT\n", -+ __func__); -+ io_result = mmc_part_switch_user(); -+ assert(io_result == 0); -+ return; -+ } -+ -+ VERBOSE("%s: FIP header found on eMMC boot partition\n", -+ __func__); -+ image_block_spec.offset = STM32MP_EMMC_BOOT_FIP_OFFSET; -+ } -+#endif - } - #endif /* STM32MP_SDMMC || STM32MP_EMMC */ - -@@ -385,8 +435,14 @@ int bl2_plat_handle_pre_image_load(unsigned int image_id) - - switch (boot_itf) { - #if STM32MP_SDMMC || STM32MP_EMMC -- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: - case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: -+#if STM32MP_EMMC_BOOT -+ if (image_block_spec.offset == STM32MP_EMMC_BOOT_FIP_OFFSET) { -+ break; -+ } -+#endif -+ /* fallthrough */ -+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: - if (!gpt_init_done) { - /* - * With FWU Multi Bank feature enabled, the selection of -diff --git a/plat/st/stm32mp1/stm32mp1_fip_def.h b/plat/st/stm32mp1/stm32mp1_fip_def.h -index 7a277fdcbb33..20761752621d 100644 ---- a/plat/st/stm32mp1/stm32mp1_fip_def.h -+++ b/plat/st/stm32mp1/stm32mp1_fip_def.h -@@ -98,8 +98,9 @@ - #endif - - /******************************************************************************* -- * STM32MP1 RAW partition offset for MTD devices -+ * STM32MP1 RAW partition offset for devices without GPT - ******************************************************************************/ -+#define STM32MP_EMMC_BOOT_FIP_OFFSET U(0x00040000) - #define STM32MP_NOR_FIP_OFFSET U(0x00080000) - #define STM32MP_NAND_FIP_OFFSET U(0x00200000) - diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/series.inc b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/series.inc index b3433d12..cf6764f2 100644 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/series.inc +++ b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/files/patches/series.inc @@ -1,26 +1,15 @@ -# umpf-base: v2.7 -# umpf-name: 2.7/customers/lxa/tac -# umpf-version: 2.7/customers/lxa/tac/20220726-1 -# umpf-topic: v2.7/customers/lxa/tac -# umpf-hashinfo: 01add11ce2cba0c1c70601f282357731f0774114 -# umpf-topic-range: 35f4c7295bafeb32c8bcbdfb6a3f2e74a57e732b..82d65342502fc88dea8572f2696656909cf85f45 +# umpf-base: v2.9 +# umpf-name: 2.9/customers/lxa/tac +# umpf-version: 2.9/customers/lxa/tac/20240130-2 +# umpf-topic: v2.9/customers/lxa/tac +# umpf-hashinfo: e9c0f04902a5616a0af04fc9490edd9f1273ab7c +# umpf-topic-range: d3e71ead6ea5bc3555ac90a446efec84ef6c6122..927790a02af8f782da3c11fc599017767d175de8 SRC_URI += "\ - file://patches/0001-fdts-add-lxa-tac.patch \ - file://patches/0002-lxatac-ETH-PLL-configuration.patch \ - file://patches/0003-lxatac-use-custom-PLL-configuration.patch \ + file://patches/0001-fdts-lxa-tac-add-Linux-Automation-GmbH-TAC.patch \ " -# umpf-topic: v2.7/topic/stm32mp1-ddr-regulator-fix -# umpf-hashinfo: f4d4acf18fd7912cb75b3efc2cbdaa2c4a58dfce -# umpf-topic-range: 82d65342502fc88dea8572f2696656909cf85f45..2ae6db960dac8636404b6a83de598b782a281d54 +# umpf-release: 2.9/customers/lxa/tac/20240130-2 +# umpf-topic-range: 927790a02af8f782da3c11fc599017767d175de8..2c9a028d8673d1b3f8ce99e58ec61c4554b60fda SRC_URI += "\ - file://patches/0101-fix-stm32mp1-fdts-stm32mp1-align-DDR-regulators-with.patch \ - " -# umpf-topic: v2.7/topic/stm32mp-emmc-boot-fip -# umpf-hashinfo: ca76e3c8c61a38d738324178fa723b3fd8b19caa -# umpf-topic-range: 2ae6db960dac8636404b6a83de598b782a281d54..c00fc3773c634f1d5d60d99f8163d5b71e38a19e -SRC_URI += "\ - file://patches/0201-refactor-mmc-export-user-boot-partition-switch-funct.patch \ - file://patches/0202-refactor-mmc-replace-magic-value-with-new-PART_CFG_B.patch \ - file://patches/0203-feat-stm32mp1-extend-STM32MP_EMMC_BOOT-support-to-FI.patch \ + file://patches/0101-Release-2.9-customers-lxa-tac-20240130-2.patch \ " # umpf-end diff --git a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.7.bb b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.9.bb similarity index 86% rename from meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.7.bb rename to meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.9.bb index 525f03ec..08bda47d 100644 --- a/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.7.bb +++ b/meta-lxatac-bsp/recipes-bsp/arm-trusted-firmware-a/tf-a-stm32mp_2.9.bb @@ -3,7 +3,7 @@ require arm-trusted-firmware-a.inc SUMMARY = "ARM Trusted Firmware-A for STM32MP1" LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" -SRC_URI[sha256sum] = "48a595475fc7766c3c54c0f4cf344921bf5a04879a88f6820c5d75645840ffc4" +SRC_URI[sha256sum] = "bca3d122ae4552677a77a70076bb229fa8b8c0358ab85ec964666bb386a9cf1b" COMPATIBLE_MACHINE = "lxatac"