-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathpage0.asm
112 lines (94 loc) · 3.16 KB
/
page0.asm
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
;==============================================================================
; Contents of this file are copyright Phillip Stevens
;
; You have permission to use this for NON COMMERCIAL USE ONLY
; If you wish to use it elsewhere, please include an acknowledgement to myself.
;
; https://github.com/feilipu/
;
; https://feilipu.me/
;
;==============================================================================
.section .v_rst, "rx"
;==============================================================================
;
; Z80 INTERRUPT ORIGINATING VECTOR TABLE
;
;==============================================================================
;------------------------------------------------------------------------------
; RST 00 - RESET / TRAP
.org 0000H, 0xFF
JP RST_00 ; Initialize Hardware and go
;------------------------------------------------------------------------------
; RST 08
.org 0008H, 0xFF
JP RST_08_ADDR
;------------------------------------------------------------------------------
; RST 10
.org 0010H, 0xFF
JP RST_10_ADDR
;------------------------------------------------------------------------------
; RST 18
.org 0018H, 0xFF
JP RST_18_ADDR
;------------------------------------------------------------------------------
; RST 20
.org 0020H, 0xFF
JP RST_20_ADDR
;------------------------------------------------------------------------------
; RST 28
.org 0028H, 0xFF
JP RST_28_ADDR
;------------------------------------------------------------------------------
; RST 30
.org 0030H, 0xFF
JP RST_30_ADDR
;------------------------------------------------------------------------------
; RST 38 - INTERRUPT VECTOR INT [ with IM 1 ]
.org 0038H, 0xFF
JP INT_INT0_ADDR
.section .v_nmi, "rx"
;------------------------------------------------------------------------------
; NMI - INTERRUPT VECTOR NMI
JP INT_NMI_ADDR
.section .v_tab_p, "rx"
;==============================================================================
;
; Z80 INTERRUPT VECTOR TABLE PROTOTYPE
;
; WILL BE DUPLICATED DURING INIT TO:
;
; ORG VECTOR_BASE
RST_00_LBL:
JP RST_00
NOP
RST_08_LBL:
JP RST_08
NOP
RST_10_LBL:
JP RST_10
NOP
RST_18_LBL:
LD A,(serRxBufUsed) ; this is called each token,
RET ; so optimise it to here
RST_20_LBL:
JP RST_20
NOP
RST_28_LBL:
JP RST_28
NOP
RST_30_LBL:
JP RST_30
NOP
INT_INT_LBL:
JP INT_INT
NOP
INT_NMI_LBL:
JP INT_NMI
NOP
.section .v_nullr, "rx"
;------------------------------------------------------------------------------
; NULL RETURN INSTRUCTIONS
INT_NMI:
RETN
;==============================================================================