refactor: Remove BLS12381 G2 Add and Double functionalities (#183)

* refactor: Remove BLS12381 G2 Add and Double functionalities

- Removed the `bls12381-g2-add` and `bls12381-g2-double` functions related to BLS12381 G2Affine points from various files.
- Deleted associated tests, files, modules, and references from test suite, codebase, libraries, and syscall map.

* chore: bump the circuit version

.gitignore

@@ -24,4 +24,5 @@ prover/build
 prover/*.tar.gz
 
 # IDE Conf
-.idea
+.idea
+prover/data

core/src/lib.rs

@@ -30,4 +30,4 @@ use stark::StarkGenericConfig;
 /// This string should be updated whenever any step in verifying an SP1 proof changes, including
 /// core, recursion, and plonk-bn254. This string is used to download SP1 artifacts and the gnark
 /// docker image.
-pub const SPHINX_CIRCUIT_VERSION: &str = "v1.0.8.2-testnet";
+pub const SPHINX_CIRCUIT_VERSION: &str = "v1.0.8.3-testnet";

core/src/runtime/record.rs

@@ -28,11 +28,7 @@ use crate::{
     operations::field::params::FieldParameters,
     stark::Indexed,
     syscall::precompiles::{
-        bls12_381::{
-            g1_decompress::{Bls12381G1DecompressChip, Bls12381G1DecompressEvent},
-            g2_add::{Bls12381G2AffineAddChip, Bls12381G2AffineAddEvent},
-            g2_double::{Bls12381G2AffineDoubleChip, Bls12381G2AffineDoubleEvent},
-        },
+        bls12_381::g1_decompress::{Bls12381G1DecompressChip, Bls12381G1DecompressEvent},
         field::{FieldChip, FieldEvent},
         quad_field::{QuadFieldChip, QuadFieldEvent},
         secp256k1::decompress::{Secp256k1DecompressChip, Secp256k1DecompressEvent},
@@ -131,8 +127,6 @@ pub struct ExecutionRecord {
     pub bls12381_fp_events: Vec<FieldEvent<Bls12381BaseField>>,
     pub bls12381_fp2_events: Vec<QuadFieldEvent<Bls12381BaseField>>,
     pub bls12381_g1_decompress_events: Vec<Bls12381G1DecompressEvent>,
-    pub bls12381_g2_add_events: Vec<Bls12381G2AffineAddEvent>,
-    pub bls12381_g2_double_events: Vec<Bls12381G2AffineDoubleEvent>,
 
     // Blake2s
     pub blake2s_round_events: Vec<Blake2sRoundEvent>,
@@ -262,18 +256,6 @@ impl EventLens<Secp256k1DecompressChip> for ExecutionRecord {
     }
 }
 
-impl EventLens<Bls12381G2AffineAddChip> for ExecutionRecord {
-    fn events(&self) -> <Bls12381G2AffineAddChip as crate::air::WithEvents<'_>>::Events {
-        &self.bls12381_g2_add_events
-    }
-}
-
-impl EventLens<Bls12381G2AffineDoubleChip> for ExecutionRecord {
-    fn events(&self) -> <Bls12381G2AffineDoubleChip as crate::air::WithEvents<'_>>::Events {
-        &self.bls12381_g2_double_events
-    }
-}
-
 impl EventLens<FieldChip<Bls12381BaseField>> for ExecutionRecord {
     fn events(&self) -> <FieldChip<Bls12381BaseField> as crate::air::WithEvents<'_>>::Events {
         &self.bls12381_fp_events
@@ -495,14 +477,6 @@ impl MachineRecord for ExecutionRecord {
             "bls12381_fp2_events".to_string(),
             self.bls12381_fp2_events.len(),
         );
-        stats.insert(
-            "bls12381_g2_add_events".to_string(),
-            self.bls12381_g2_add_events.len(),
-        );
-        stats.insert(
-            "bls12381_g2_double_events".to_string(),
-            self.bls12381_g2_double_events.len(),
-        );
 
         stats.insert(
             "blake2s_round_events".to_string(),
@@ -554,10 +528,6 @@ impl MachineRecord for ExecutionRecord {
             .append(&mut other.bls12381_fp2_events);
         self.bls12381_g1_decompress_events
             .append(&mut other.bls12381_g1_decompress_events);
-        self.bls12381_g2_add_events
-            .append(&mut other.bls12381_g2_add_events);
-        self.bls12381_g2_double_events
-            .append(&mut other.bls12381_g2_double_events);
         self.blake2s_round_events
             .append(&mut other.blake2s_round_events);
 
@@ -887,18 +857,6 @@ impl MachineRecord for ExecutionRecord {
             self.nonce_lookup.insert(event.lookup_id, i as u32);
         }
 
-        // Bls12-381 G2Affine addition events.
-        first.bls12381_g2_add_events = take(&mut self.bls12381_g2_add_events);
-        for (i, event) in first.bls12381_g2_add_events.iter().enumerate() {
-            self.nonce_lookup.insert(event.lookup_id, i as u32);
-        }
-
-        // Bls12-381 G2Affine doubling events.
-        first.bls12381_g2_double_events = take(&mut self.bls12381_g2_double_events);
-        for (i, event) in first.bls12381_g2_double_events.iter().enumerate() {
-            self.nonce_lookup.insert(event.lookup_id, i as u32);
-        }
-
         // blake2s_round events
         first.blake2s_round_events = take(&mut self.blake2s_round_events);
         for (i, event) in first.blake2s_round_events.iter().enumerate() {

core/src/runtime/syscall.rs

@@ -8,8 +8,6 @@ use crate::runtime::{Register, Runtime};
 use crate::stark::Ed25519Parameters;
 use crate::syscall::precompiles::blake2s::Blake2sRoundChip;
 use crate::syscall::precompiles::bls12_381::g1_decompress::Bls12381G1DecompressChip;
-use crate::syscall::precompiles::bls12_381::g2_add::Bls12381G2AffineAddChip;
-use crate::syscall::precompiles::bls12_381::g2_double::Bls12381G2AffineDoubleChip;
 use crate::syscall::precompiles::edwards::EdAddAssignChip;
 use crate::syscall::precompiles::edwards::EdDecompressChip;
 use crate::syscall::precompiles::field::{FieldAddSyscall, FieldMulSyscall, FieldSubSyscall};
@@ -101,8 +99,6 @@ pub enum SyscallCode {
     BLS12381_FP2_ADD = 0x00_01_01_77,
     BLS12381_FP2_SUB = 0x00_01_01_78,
     BLS12381_FP2_MUL = 0x00_01_01_79,
-    BLS12381_G2_ADD = 0x00_01_01_80,
-    BLS12381_G2_DOUBLE = 0x00_00_01_81,
 
     /// Executes the `SHA512_EXTEND` precompile.
     SHA512_EXTEND = 0x00_00_01_C1,
@@ -160,8 +156,6 @@ impl SyscallCode {
             0x00_01_01_71 => SyscallCode::BLS12381_G1_ADD,
             0x00_00_01_72 => SyscallCode::BLS12381_G1_DOUBLE,
             0x00_01_01_F2 => SyscallCode::BLS12381_G1_DECOMPRESS,
-            0x00_01_01_80 => SyscallCode::BLS12381_G2_ADD,
-            0x00_00_01_81 => SyscallCode::BLS12381_G2_DOUBLE,
             0x00_01_01_ED => SyscallCode::BLAKE_2S_ROUND,
             0x00_00_01_C1 => SyscallCode::SHA512_EXTEND,
             0x00_00_01_C2 => SyscallCode::SHA512_COMPRESS,
@@ -394,14 +388,6 @@ pub fn default_syscall_map() -> HashMap<SyscallCode, Arc<dyn Syscall>> {
         SyscallCode::BLS12381_G1_DECOMPRESS,
         Arc::new(Bls12381G1DecompressChip::new()),
     );
-    syscall_map.insert(
-        SyscallCode::BLS12381_G2_ADD,
-        Arc::new(Bls12381G2AffineAddChip::new()),
-    );
-    syscall_map.insert(
-        SyscallCode::BLS12381_G2_DOUBLE,
-        Arc::new(Bls12381G2AffineDoubleChip::new()),
-    );
     syscall_map.insert(
         SyscallCode::SHA512_EXTEND,
         Arc::new(Sha512ExtendChip::new()),
@@ -523,12 +509,6 @@ mod tests {
                 }
                 SyscallCode::HINT_LEN => assert_eq!(code as u32, sphinx_zkvm::syscalls::HINT_LEN),
                 SyscallCode::HINT_READ => assert_eq!(code as u32, sphinx_zkvm::syscalls::HINT_READ),
-                SyscallCode::BLS12381_G2_ADD => {
-                    assert_eq!(code as u32, sphinx_zkvm::syscalls::BLS12381_G2_ADD)
-                }
-                SyscallCode::BLS12381_G2_DOUBLE => {
-                    assert_eq!(code as u32, sphinx_zkvm::syscalls::BLS12381_G2_DOUBLE)
-                }
                 SyscallCode::BLAKE_2S_ROUND => {
                     assert_eq!(code as u32, sphinx_zkvm::syscalls::BLAKE_2S_ROUND)
                 }